The well-known DIMM (Dual In-line Memory Module) board has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Systems that employ DIMMs provide, however, very limited profile space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.
As bus speeds have increased, fewer devices per channel can be reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DIMM. Using the DDR-200 bus protocol, approximately 144 devices may be addressed per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the fully-buffered DIMM (FB-DIMM) with buffered C/A and data in which 288 devices per channel may be addressed. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 from the approximately 240 pins previously required.
The FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility.
This improvement has, however, come with some cost and will eventually be self-limiting. The basic principle of systems that employ FB-DIMM relies upon a point-to-point or serial addressing scheme rather than the parallel multi-drop interface that dictates non-buffered DIMM addressing. That is, one DIMM is in point-to-point relationship with the memory controller and each DIMM is in point-to-point relationship with adjacent DIMMs. Consequently, as bus speeds increase, the number of DIMMs on a bus will decline as the discontinuities caused by the chain of point to point connections from the controller to the “last” DIMM become magnified in effect as speeds increase.
Another coming issue in memory module strategy and design arises from expected increases in circuit die sizes and the concomitant increases in package sizing. When packaged, it is expected that typical DRAMs of coming densities and capacities will not readily fit on 30 mm. JEDEC DIMMs of conventional construction. Consequently, conventional DIMM design is unlikely to accommodate the underlying memory technology as die sizes rise to meet the ubiquitous pressures for greater capability.
Consequently, methods to increase the capacity of DIMMs and PCI modules as well as other circuits and designs find value in contemporary memory and computing systems. There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space. The additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card and the additional thickness of the daughter card(s) increases the profile of the DIMM.
Multiple die packages (MDP) are also used to increase DIMM capacity while preserving profile conformity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.
Stacked packages are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits. Staktek Group L.P. has developed numerous systems for aggregating CSP (chipscale packaged) devices in space saving topologies. The increased component height of some stacking techniques may alter, however, system requirements such as, for example, required cooling airflow or the minimum spacing around a circuit board on its host system.
What is needed, therefore, are methods and structures for increasing the capacity and flexibility of circuit modules.